FW843 and FW842
  • Provides digital and analog functions to implement up to a three-port node in an IEEE® 1394 network
  • Ports are IEEE® 1394-2008 compliant and backward-compatible with IEEE 1394b-2002, 1394a-2000, and 1394-1995 specifications
  • All ports capable of monitoring line conditions for determining connection status, initialization and arbitration, and packet reception and transmission

The FW843 and FW842 provide the digital and analog functions needed to implement up to a three-port node in an IEEE 1394 network (FW843 can be used in applications requiring three ports). The FW842 and FW843 are cost effective solutions that include an on-chip voltage regulator to enable operation from a single 3.3 V power supply as well as an on-chip crystal oscillator that only requires an external 24.576MHz crystal. The FW842 56-pin MLCC package provides the industry’s smallest footprint for a 1394b PHY in a leaded package. In addition, both devices offer a common-mode noise filter on the incoming bias detect circuit to filter out crosstalk noise.

The FW843 and FW842 are power-aware solutions, featuring fail-safe circuitry that senses a sudden loss of power to the device. The ports are disabled to ensure that either solution do not load the TPBIAS with any connected device and blocks any leakage from the port back to the power plane. The low-jitter on-chip crystal oscillator provides transmit and receive data at 98.304 Mbits/s, 196.608 Mbits/s, 393.216 Mbits/s, 983.04 Mbits/s, and a link-layer controller clock at 49.152 MHz or 98.304 MHz.

Key Applications

External storage and audio application

Features

  • Provides up to three backward-compatible IEEE-1394 bilingual cable ports
  • Fully supports provisions of IEEE 1394b-2002, IEEE 1394a-2000, and IEEE 1394-1995 standards
  • On-chip (PLL) for high-speed clock generation
  • Single 3.3 V supply and on-chip 1.1 V voltage regulator
  • Power efficient solution that provides: low-power sleep mode, power down modes to conserve energy for battery-operated applications, and cable power sense function to detect external cable power.
  • Fully compliant with open host controller interface (OHCI) requirements
  • Register bits give software control of contender bit, power class bits, link active control bit, and 1394a-2000
    features
  • External pin control of power-class bits
  • Data interface to link-layer mode is pin-selectable from 1394a-2000 mode or 1394b-2002 mode
  • Interoperable with other 1394 physical layers using 1.8 V, 3.3 V, and 5.0 V supplies
  • Package Specifications:
      • 84-pin MLCC package (FW843)
      • 56-pin MLCC package (FW842)

Benefits

    • Each of the ports can be configured to work in data-strobe mode only (1394a-2000) by pulling the corresponding DSMO input pin to the 3.3 V supply
  • Supports the following IEEE 1394 speeds:
    -  S100 (98.304 Mbits/s)
    -  S200 (196.608 Mbits/s)
    -  S400 (393.216 Mbits/s)
    -  S400B (491.52 Mbits/s)
    -  S800B (983.04 Mbits/s)
  • Compliant and interoperable with IEEE 1394 TA specification.

 

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